;---------------------------------------------------------------------------------------------
;       HEADER:
;---------------------------------------------------------------------------------------------
              LIST          P=16f628 
              RADIX         DEC 
              INCLUDE       "p16f628.inc" 
              __CONFIG      _CP_OFF & _WDT_OFF & _XT_OSC & _PWRTE_ON & _BODEN_OFF & _LVP_OFF


#define       Clock_Freq    4000000

;---------------------------------------------------------------------------------------------
;       EQUATES:
;---------------------------------------------------------------------------------------------

STARTOFRAM    equ           0x20              ;First Usable RAM Location for 16f628
ENDOFRAM      equ           0x6F              ;Last Usable RAM Location for 16f628
FIXEDAREA     equ           0x70              ;Start of shared memory between banks
BANK2RAM      equ           0xA0              ;Start of Bank 2 RAM

;---------------------------------------------------------------------------------------------
; General Purpose Temp Storage
;---------------------------------------------------------------------------------------------

              cblock STARTOFRAM
LoopCounter
              endc
              
;---------------------------------------------------------------------------------------------
; Common Area Temp Storage (visible from any bank)
;---------------------------------------------------------------------------------------------

              cblock FIXEDAREA

;
; ISR Register Context Save Areas
;
INT_FLAGS
W_TEMP
STATUS_TEMP
FSR_TEMP
PCLATH_TEMP

              endc
;---------------------------------------------------------------------------------------------
;       START:
;---------------------------------------------------------------------------------------------
              org         0x000
              goto        Start
              
; Interrupt handler
              org         0x004
              movwf       W_TEMP              ;Save everything               
              swapf       STATUS, W
              movwf       STATUS_TEMP
              movfw       FSR
              movwf       FSR_TEMP
              movfw       PCLATH
              movwf       PCLATH_TEMP

              goto        IntExit
;
; Restore everything and return
;
IntExit
              movfw       PCLATH_TEMP
              movwf       PCLATH
              movfw       FSR_TEMP
              movwf       FSR
              swapf       STATUS_TEMP, W
              movwf       STATUS
              swapf       W_TEMP, F
              swapf       W_TEMP, W
              retfie


;---------------------------------------------------------------------------------------------
;
;  Main level code begins here
;
;---------------------------------------------------------------------------------------------

Start
              bsf         STATUS, RP0          ; Switch to Bank 1
              movlw       b'00000000'          ; Define I/O on Port B (all output)
              movwf       TRISB & 0x07F
              movlw       b'00000000'          ; Define I/O on Port A (all output)
              movwf       TRISA & 0x07F
              bcf         STATUS, RP0          ; Back to Bank 0

              movlw       0x07                 ; Turn off the comparators (common newbie mistake to miss this)
              movwf       CMCON
              
              clrf        PORTA                ; Drive all pins low initially
              clrf        PORTB
              
Main

; Drive the pins high
              movlw       0xFF
              movwf       PORTA
              movwf       PORTB
              
; A couple of no-ops to square up the output waveform              
              nop
              nop

; Drive the pins low              
              movlw       0x00
              movwf       PORTA
              movwf       PORTB

; Loop back forever
              goto        Main
              
              end                               ; Don't forget to include one of these